مهندس معماري لأجهزة السلامة الوظيفية لشرائح VLSI

Envision Employment Solutions is currently looking for a VLSI Functional Safety Hardware Architect for one of our partners, an IT Services and IT Consulting company.

THE ROLE

In automotive silicon, a missed fault isn't a bug report, it's a safety risk. You'll define and build the safety mechanisms inside complex ASICs and SoCs, turning ISO 26262 requirements into RTL that is traceable, verifiable and ready for certification. You'll be the bridge between the functional safety team and the designers who build the chip.

WHAT YOU'LL DO

• Contribute to SoC architecture definition, subsystem design and RTL microarchitecture
• Design and integrate functional safety mechanisms at RTL and SoC level in line with ISO 26262 and target ASIL levels
• Translate safety requirements into RTL and keep traceability through implementation and verification
• Configure, integrate and customise internal, third party and black box IPs
• Create and maintain IP level documentation covering safety requirements, mechanisms, diagnostics, assumptions and integration constraints
• Support fault analysis, safety reviews and functional safety work products throughout the lifecycle
• Collaborate with safety, verification, design and system teams, and consider SoC to PCB level interactions

WHAT WE'RE LOOKING FOR

• 10+ years of experience in ASIC and/or SoC development
• Strong hands on RTL design in Verilog and SystemVerilog
• Practical experience applying ISO 26262 and ASIL requirements in semiconductor development
• Experience implementing and documenting safety mechanisms such as redundancy, fault detection and safety monitoring
• Solid experience with IP integration, configuration and customisation
• Knowledge of ARM and/or RISC-V, AXI and NoC interconnects
• Understanding of hardware and software interaction and board level considerations
• Strong communication and stakeholder management skills

YOU'LL THRIVE HERE IF YOU

• You think about how a design fails as carefully as how it works
• You write documentation that an assessor and an integrator can both use
• You're comfortable owning the safety story of an IP end to end
• You enjoy working at the point where architecture meets RTL
• You want your work to go into products people trust with their lives

Desired Candidate Profile

10+ years of experience in ASIC and/or SoC development

Strong hands on RTL design in Verilog and SystemVerilog

Practical experience applying ISO 26262 and ASIL requirements in semiconductor development

Experience implementing and documenting safety mechanisms such as redundancy, fault detection and safety monitoring

Solid experience with IP integration, configuration and customisation

Knowledge of ARM and/or RISC-V, AXI and NoC interconnects

Understanding of hardware and software interaction and board level considerations

Strong communication and stakeholder management skills